HyperBGA Flouropolymer-Based Coreless Semiconductor Packaging

Semiconductor Packaging | Printed Circuit Boards | Complex Assembly Solutions | Precision Equipment Manufacturing

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Features

Outstanding SiP solution offers long lasting overall board level flip chip BGA life

Delivers 2–10 times the flip chip BGA package reliability over ceramic BGAs

Assembled using standard SMT processes and materials; columns or land grid array sockets are unnecessary

Full strip line structures

Low coupled noise

Low weight

Very low power distribution inductance

Great SiP solution capable of flip chip, SMT or CSP component attach on both sides

Compliant laminate minimizes die and BGA stress when using large die and large body sizes

Substrate engineered to balance the CTE mismatch between silicon and printed circuit board for high reliability

Voltage plane splits provide the ability to turn on/off a higher number of selected die areas for improved power consumption and noise control

Thin, low profile
fits easily in tight board-to-board spaces

Parts available
in any shape, enabling the merger of dense circuitization found in chip packaging with configuration variety found in traditional PCB technology

Literature

HyperBGA® Specification Chart

Technical Papers

“Thermal Enhancement of Systems using Flip Chip Packages with an Alternate Cooling Path through the PCB” presented at Electronic Components and Technology Conference (ECTC) 2006. click here

“AC Coupled Interconnect using Buried Bumps for Laminated Organic Packages” presented at Electronic Components and Technology Conference (ECTC) 2006.
click here

“Modeling and Simulation of 12.5 Gbps on a HyperBGA^® Package” presented at IEEC 2003. click here

“Thermal Performance of a High End Flip Chip Organic Package” presented at International Microelectronics and Packaging Society (IMAPS) 2003. click here

HyperBGA® Semiconductor Packaging

EI’s HyperBGA^® flouropolymer-based coreless semiconductor packaging allows your die to run at extremely high rates of speed. The combination of the low loss, low dielectric constant material and strip line cross sections enable signal speeds surpassing 12 Gb/s. The material compliance of the PTFE, combined with the dimensional stability of a copper-invar-copper center plane, enables HyperBGA^® to provide long field life, with none of the BGA wear out, die cracking, delamination or flip chip bump fatigue other packages exhibit.

Applications

The HyperBGA^® product line is a great solution for defense & aerospace, communications & computing, semiconductor, advanced test equipment, and medical markets where speed, reliability and increased signal I/O, along with reduced weight, height and overall package size are critical. This low stress flip chip laminate package is also ideally suited to graphics applications that require high data processing speeds or any application requiring a system-in-package (SiP) approach.